Analytical tool for FPGA based true random number generators (TRNG)

Abstract

To develop an analytic tool and working flow to analysis FPGA based, which is purely digital elements, True number generator. This FYP project aims at facilitating the future study of True random number generator, TRNG, on FPGA. In order to design a better FPGA based TRNG design in term of randomness quality, we need to provide a fair, flexible, user-friendly TRNG evaluation and analytical tool. A better TRNG is essential for FPGA-based processor and other cryptography purpose. In this project, four exiting TRNG designs have been implemented for testing the analytic tools. In this tool, the Ethernet port will be enabled with the use of Ethernet IP block and a finite state machine for controlling the data-flow. After collecting the data at a very high-speed, about 8 GBps, those data is then post-processed and tested by the 1) Diehard test and 2) NIST test. Post-processing module has been developed in this project for removing the bias in order to provide a better understanding of the weakness of the TRNG. Besides the statistic test, visualization of the random sequence has also been implemented to investigate the TRNG in a user-friendly way. The post-processing enables a significant improvement of the result in the statistic test, and the visualization of the random number sequence also enables to examine the sequence by observing the pattern in the image. A new statistical test and new standard for the FPGA based TRNG can be a possible direction for future work. The project has built an important and fundamental tool for the future study for developing new TRNG cores on FPGA.