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DC Field | Value | Language |
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dc.contributor.author | Cheung, Ka Yau | en_US |
dc.date.accessioned | 2011-09-15T01:51:39Z | |
dc.date.accessioned | 2017-09-19T09:12:15Z | |
dc.date.accessioned | 2019-02-12T07:29:47Z | - |
dc.date.available | 2011-09-15T01:51:39Z | |
dc.date.available | 2017-09-19T09:12:15Z | |
dc.date.available | 2019-02-12T07:29:47Z | - |
dc.date.issued | 2011 | en_US |
dc.identifier.other | 2011eecky135 | en_US |
dc.identifier.uri | http://144.214.8.231/handle/2031/6374 | - |
dc.description.abstract | Multimedia instruction set is in fact a set of instructions for handling a large amount of data. One idea is SIMD: Single Instruction, Multiple Data. That is, many data are processed within one instruction. This instruction set is implemented on a machine called jHISC. The characteristic of jHISC machine is that it is designed along with an Object concept. This jHISC machine is not a real entity. It is a descriptive machine by VHDL. However, the implementation of multimedia instruction set is by Verilog. Therefore, besides the new modules are implemented on the jHISC machine, some entities from the original jHISC machine are selected to be converted into Verilog, and modified in order to cooperate with the implemented multimedia instruction set. | en_US |
dc.rights | This work is protected by copyright. Reproduction or distribution of the work in any format is prohibited without written permission of the copyright owner. | en_US |
dc.rights | Access is restricted to CityU users. | en_US |
dc.title | Multimedia instruction set for an object computing system | en_US |
dc.contributor.department | Department of Electronic Engineering | en_US |
dc.description.supervisor | Supervisor: Dr. Fong, Anthony S S; Assessor: Dr. Cheung, Ray C C | en_US |
Appears in Collections: | Electrical Engineering - Undergraduate Final Year Projects |
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fulltext.html | 146 B | HTML | View/Open |
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