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Please use this identifier to cite or link to this item: http://dspace.cityu.edu.hk/handle/2031/6316
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dc.contributor.authorLam, Pak Ninen_US
dc.date.accessioned2011-09-15T01:51:36Z
dc.date.accessioned2017-09-19T09:11:55Z
dc.date.accessioned2019-02-12T07:29:21Z-
dc.date.available2011-09-15T01:51:36Z
dc.date.available2017-09-19T09:11:55Z
dc.date.available2019-02-12T07:29:21Z-
dc.date.issued2011en_US
dc.identifier.other2011eelpn700en_US
dc.identifier.urihttp://144.214.8.231/handle/2031/6316-
dc.description.abstractThis thesis proposes an alternate methodology for designing digital sequential circuit by analog integrated circuit technique. Traditional sequential circuit is built by lots of Flip-flop and the power consumption depends on the clock frequency. Nowadays, many devices require high speed, low voltage and low power performance, especially for RFID. Traditional methodology hardly reaches these requirements. The new analog continuous-time signal processing concept may be the better way to achieve that. The Analog Computational "soft-gates" Circuit, Analog Artificial Neural Networks(ANN) and current mode filter have been previously proposed, but an integrated set of those analog circuits is still lacking. In this project, an analog Linear Feedback Shift Registers(LFSR) which based on the "softgates" and log-domain filter integrated in a 0.6um BiCMOS process is presented.en_US
dc.rightsThis work is protected by copyright. Reproduction or distribution of the work in any format is prohibited without written permission of the copyright owner.en_US
dc.rightsAccess is restricted to CityU users.en_US
dc.titleAnalogue VLSI techniques in securing constrained devicesen_US
dc.contributor.departmentDepartment of Electronic Engineeringen_US
dc.description.supervisorSupervisor: Dr. Cheng, L M; Assessor: Dr. Siu, Timothy Y Men_US
Appears in Collections:Electrical Engineering - Undergraduate Final Year Projects 

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