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Please use this identifier to cite or link to this item: http://dspace.cityu.edu.hk/handle/2031/3718
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dc.contributor.authorTsang, Man Wangen_US
dc.date.accessioned2006-11-16T08:44:34Zen_US
dc.date.accessioned2007-05-14T06:53:36Z
dc.date.accessioned2017-09-19T09:14:00Z
dc.date.accessioned2019-02-12T07:32:06Z-
dc.date.available2006-11-16T08:44:34Zen_US
dc.date.available2007-05-14T06:53:36Z
dc.date.available2017-09-19T09:14:00Z
dc.date.available2019-02-12T07:32:06Z-
dc.date.issued2006en_US
dc.identifier.other2006eetmw329en_US
dc.identifier.urihttp://144.214.8.231/handle/2031/3718-
dc.description.abstractThree-level Neutral-point-clamped inverters are increasingly applied in high power and high voltage application. They allow the use of lower voltage devices and provide reduced output voltage total harmonic distortion. However, the traditional modulation scheme causes a low frequency oscillation of the neutral-point voltage (especially for high modulation index and low power factors loading) that increases the voltage stress on the device and capacitors, and the need for larger dc-link capacitors. In order to keep the neutral-point voltage balance, many researchers have proposed several modified scheme. In this report, a comprehensive analysis and comparison for four schemes (Radial State SVM, Nearest Three Virtual SVPWM, 3D SVM and traditional SVM) were performed with computer simulation.en_US
dc.format.extent164 bytes
dc.format.mimetypetext/html
dc.language.isonullen_US
dc.rightsThis work is protected by copyright. Reproduction or distribution of the work in any format is prohibited without written permission of the copyright owner.en_US
dc.rightsAccess is restricted to CityU users.en_US
dc.titleComprehensive analysis of neutral point clamped inverteren_US
dc.contributor.departmentDepartment of Electronic Engineeringen_US
dc.description.supervisorSupervisor: Prof. Hui, Ron S Y. Assessor: Prof. Chung, Henry S Hen_US
Appears in Collections:Electrical Engineering - Undergraduate Final Year Projects 

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